Heterogeneous and Chiplet-Based Computing

We design and evaluate next-generation heterogeneous systems that combine CPUs, accelerators, memory, interconnects, and chiplets in 2.5D and 3D integration technologies. Our work studies how architecture, network-on-interposer design, placement, power delivery, and thermal constraints interact in advanced multi-chiplet systems. We develop multi-objective optimization approaches to co-optimize energy efficiency, performance, cost, and reliability under power consumption and temperature constraints.

Our work combines theoretical approaches with experimental validation on commercial systems (when available) and systematic simulations (for future systems).